/*
 * $Header: /smsa/bsd:include/arm/ioc.h:bsd  1.7  $
 * $Source: /smsa/bsd:include/arm/ioc.h: $
 *
 * Copyright (c) 1988 Acorn Computers Ltd., Cambridge, England
 *
 */

#ifndef	__arm_ioc_h
#define	__arm_ioc_h
#define	__machine_ioc_h		"arm"

/* ioc.h
 *
 * Definition of IOC chip as memory-mapped byte-register structure
 */

typedef struct {
  volatile unsigned char
    status,  pad0a, pad0b, pad0c,
    request, pad1a, pad1b, pad1c,
    mask,    pad2a, pad2b, pad2c,
      pad3a, pad3b, pad3c, pad3d;
} intr_block;

typedef struct {
  volatile unsigned char
    count_lo,  pad0a, pad0b, pad0c,   /* (R) = latch_lo (W) */
#define latch_lo count_lo
    count_hi,  pad1a, pad1b, pad1c,   /* (R) = latch_hi (W) */
#define latch_hi count_hi
    go_cmd,    pad2a, pad2b, pad2c,   /* (W) */
    latch_cmd, pad3a, pad3b, pad3c;   /* (W) */
} timer_block;
    
         
typedef struct {
  volatile unsigned char
    control,   pad0a, pad0b, pad0c,   /* 00..03 read/write (CAREFUL!) */
    kart_data, pad1a, pad1b, pad1c;   /* 04..07 read:RX, write:TX */
  unsigned int pad2,                         /* 08..0B */
        pad3;                         /* 0C..0F */
  intr_block
    irq_A,                            /* 10..1F */
    irq_B,                            /* 20..2F */
    fiq;                              /* 30..3F */
  timer_block
    timer_0,                          /* 40..4F */
    timer_1,                          /* 50..5F */
    timer_baud,                       /* 60..6F */
    timer_kart;                       /* 70..7F */
} ioc_block, *IOCRef, *ioc_block_ref;

#define irq_clear irq_A.request   /* write only */

#define IOC_BASE_ADDRESS  0x03200000
#define IOC               ((ioc_block_ref)IOC_BASE_ADDRESS)

/* Control port register bits */

#define IOC_CON_I2C_DATA     (1<<0)	/* I2C Bus data  line - R/W */
#define IOC_CON_I2C_CLOCK    (1<<1)	/* I2C Bus clock line - R/W */
/*
 * The sound mute line is defined on all machines, but only performs
 * its expected function on the A500 and A440.  On A680 it must be 
 * left as a 1.
 */
#define IOC_CON_SOUND_MUTE   (1<<5)	/* Sound Mute (A500/A440) - R/W */
/*
 * The set of bits which must be 1 when writing to the control port,
 * on any machine.
 */
#define IOC_CON_WRITE_SET   (1<<7 | 1<<6 | 1<<4 | 1<<3 | 1<<2)


/* The following bits are defined for A4x0 machines */
#define IOC_CON4_DISC_READY  (1<<2)	/* floppy drive ready - RO */
#define IOC_CON4_AUX_C4	     (1<<4)	/* aux I/O line (unused) R/W */

/* The following 3 bits are present only on A500's */
#define IOC_CON5_RTC_MINUTES (1<<2)	/* Real Time Clock minutes - RO */
#define IOC_CON5_RTC_SECONDS (1<<3)	/* Real Time Clock seconds - RO */
#define IOC_CON5_DISC_CHANGE (1<<4)	/* Floppy disc changed - RO */

/* The following bit is defined on A680. */
#define IOC_CON6_DISC_CHANGE (1<<2)	/* floppy disc changed - RO */

/* Interrupt control register bits */

/* IRQ A block - mostly latched events, cleared via IRQ clear reg */

#define  IRQA_PBSY   (1 << 0)   /* Printer BuSY */
#define  IRQA_RII    (1 << 1)   /* Serial line RInging Indication */
#define  IRQA_PACK   (1 << 2)   /* Printer ACKnowledge event */
#define  IRQA_VFLY   (1 << 3)   /* Vertical FLYback event */
#define  IRQA_POR    (1 << 4)   /* Power On Reset */
#define  IRQA_TM0    (1 << 5)   /* Timer 0 expiry */
#define  IRQA_TM1    (1 << 6)   /* Timer 1 expiry */
#define  IRQA_FORCE  (1 << 7)   /* Force IRQ int bit (permanently 1) */

/* IRQ B block */

#define  IRQB_XFIQ   (1 << 0)   /* XCB FIQ(!) bit - mask OFF */
#define  IRQB_SND    (1 << 1)   /* Sound buffer switch event */
#define  IRQB_SLCI   (1 << 2)   /* Serial Line Controller Int */
#define  IRQB_WINC   (1 << 3)   /* Winchester Controller int */
#define  IRQB_WIND   (1 << 4)   /* Winchester Data int */
#define  IRQB_WINCD  (1 << 3)	/* Combined Controller/Data bit (Archimedes) */
#define  IRQB_FDDC   (1 << 4)	/* Floppy Disc Disc Changed (Archimedes) */
#define	 IRQB_FDINT  (1 << 4)   /* Floppy disc intr (A680) */
#define  IRQB_XCB    (1 << 5)   /* Expansion card common IRQ */
#define  IRQB_KSTX   (1 << 6)   /* KART transmitter done */
#define  IRQB_KSRX   (1 << 7)   /* KART receiver data ready */

/* FIQ block */

#define  FIQ_FDDR    (1 << 0)   /* Floppy Disc Data Request */
#define  FIQ_FDIR    (1 << 1)   /* Floppy Disc Interrupt Request */
#define  FIQ_ECONET  (1 << 2)   /* ECOnet interrupt */
  /* 3..5 not used */
#define  FIQ_XCB     (1 << 6)   /* XCB card FIQ */
#define  FIQ_FORCE   (1 << 7)   /* Force FIQ int (permanently 1) */

/* Delay required after SRX set in IRQ B status before read KART data reg,
 * with KART serial line on maximum speed.
 */

#define  IOC_KART_BUG_DELAY  16        /* in microseconds: 1/2 bit time */

#endif/*__arm_ioc_h*/

/* EOF ioc.h */
