/*
 * $Header: /smsa/bsd:include/arm/xcbregs.h:bsd  1.3  $
 * $Source: /smsa/bsd:include/arm/xcbregs.h: $
 *
 * Copyright (c) 1988 Acorn Computers Ltd., Cambridge, England
 *
 */

/* xcbregs.h
 *
 * Definition of expansion card bus (XCB) backplane 
 * interrupt control registers.
 */
#ifndef  __arm_xcbregs_h
#define  __arm_xcbregs_h
#define  __machine_xcbregs_h	"arm"

/*
 * For each of req and mask, the bottom 4 bits of the 
 * register correspond to slots 0..3 respectively.
 * The top 4 bits are undefined.
 */ 
typedef struct xcb_regs
{
    volatile unsigned char req, _pad1[3], mask, _pad2[3];
} XCBRegs, *XCBRegsRef;


#define XCB_REGS	((XCBRegsRef)0x03360000)

/*
 * The following item lives in locore.s (in irq handling code) and is
 * initialised by the XCB manager early in booting.  If there is
 * working backplane interrupt control hardware, xcb_regs will point to
 * its registers, otherwise it will contain NULL (0).
*/
extern XCBRegsRef xcb_regs;

#endif/*__arm_xcbregs_h*/

/* EOF xcbregs.h */
